Embedded Systems Demystified – Discover the Most Popular Interview Questions

Welcome to your Embedded Systems Demystified – Discover the Most Popular Interview Questions

1. 
Which of the following statements about CAN message prioritization is true?

2. 
MISRA does not allow

3. 
CAN FD stands for

4. 
Which CAN error occurs when two or more nodes start transmitting at the same time?

5. 
CAN uses which coding scheme for error detection?

6. 
Which of the following is a standard CAN frame format?

7. 
What does a DMA controller do?

8. 
Which CAN frame type allows a node to request data from another node?

9. 
What is return of ISR?

10. 
Which of the following CAN versions supports Flexible Data-rate (FD)?

11. 
Which of the following CAN frame types is used for time-critical data?

12. 
How can stack/heap memory can change

13. 
MISRA not allow below expression val = fun1() + fun2()

14. 
Which of following is not true in timer operation

15. 
What is maximum data length in CAN and CAN FD

16. 
Which of following is try for ADC sampling frequency

17. 
Which of the following is handshake signal

18. 
What is the role of a CAN controller?

19. 
Which of the following is not an error detection mechanism used in CAN?

20. 
Which of the following is a characteristic of CAN communication?

21. 
What is byte order in I2C

22. 
Which of following V ref of ADC can provide better resolution

23. 
What is the maximum number of nodes that can be connected to a CAN bus?

24. 
Which of the following CAN frame fields contains the priority of the message?

25. 
Which of the following is the basic functions of a timer

26. 
in application programming support

27. 
What type of bus topology does CAN typically use?

28. 
Which of the following is a valid reason for a CAN node to go into the "Bus Off" state?

29. 
Maximum switch case allow in MISRA

30. 
Which layer of the OSI model does CAN protocol primarily operate on?

31. 
SMT32 device can fetch instruction from

32. 
What is the identifier length in CAN2.0 and CAN FD

33. 
Which register is used to enable LSE clock in STM32

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